Traditional methods or systems for scribing, cutting and separating semiconductor devices from a semiconductor wafer, i.e. dicing, rely on cutting a street defined by a scribe line, using a diamond saw or a laser. Cutting produces a kerf with side walls or edges, the kerf width being the distance or spacing between opposing side walls or edges. In throughcutting, a single pass is made using the diamond saw or laser, cutting all the way through the wafer. In another technique, known as wafer fracturing, die separation is performed by cutting along a street partially through the thickness of the wafer, then cracking the wafer along the street and separating the dice. A scribe line can be expressed or delineated physically on the wafer, using scribe line geometries that are photolithographically deposited using one or more layers on the wafer, such as by using photoresist and etching. A scribe line can be physically delineated on, the wafer by laser ablation of the wafer surface. Alternatively, a scribe line can be defined on the wafer in the abstract, for example using data in a computer memory, as a path along which a street is to be cut where only a reference feature on the wafer is needed. Whether or not a scribe line is physically delineated on a wafer, the scribe line can be expressed as a set of coordinates relative to the wafer.
Mechanical cutting of semiconductor wafers can cause cracks, splitting, damage to PN junctions and other effects on the wafers and devices being fabricated on the wafers. The width of the street and the corresponding amount of material removed represents wasted area of the wafer. It is desired to minimize the width of the street and minimize the wasted area of the wafer, thereby minimizing the cost per die produced.
Laser cutting generally produces a narrower street than diamond saw cutting. However, local heating from laser cutting can damage PN junctions. Combining a semiconductor wafer with one or more additional materials poses additional challenges to laser cutting or mechanical cutting.
Standard silicon wafers are nominally 275 microns to 775 microns thick, although additional sizes have been and are being developed. Thin wafers are nominally 100 microns to 150 microns thick. Ultrathin wafers can support thin films of nanometer or monolayer thicknesses and be up to several microns thick. Thin wafers or ultrathin wafers may need additional support during fabrication and handling, which poses challenges to laser cutting or mechanical cutting.
Solar cells, also known as photovoltaic cells, can be made from silicon wafers or gallium arsenide wafers, or from thin films such as gallium arsenide films, among other materials. Epitaxial lift-off (ELO) films can be grown on wafers, then transferred to support surfaces. U.S. published application 2010/0219509 entitled “Tiled Substrates for Deposition and Epitaxial Lift Off Processes” by G. He and A. Hegedus, assigned to the assignee of the present invention and incorporated by reference herein, shows epitaxially grown film stacks transferred to a support substrate in a tiling pattern with gaps or streets between each of the ELO film stacks. An extensive list of support substrate materials is contained in the aforementioned published application.
Typically, solar cells are cut from semiconductor wafers and mounted in a solar panel. Solar cells generally have one PN junction fabricated vertically in the wafer, often with the N type material towards the front major surface of the wafer and the P type material towards the back major surface of the wafer. Metal traces on the front surface of the wafer are connected as one or more buss bars to one terminal of the solar cell, and metal backing the entirety of the back surface of the wafer is connected to another terminal of the solar cell. The presence of the large PN junction throughout the solar cell poses challenges to laser cutting or mechanical cutting, as shorting of the PN junction at any location on a scribe line can ruin the entire solar cell.
Slag or ablation debris is produced during laser cutting, and deposited along edges of the cut and nearby surfaces. This debris can short-circuit electrical junctions of solar cells or integrated circuits, or provide resistive paths degrading device performance. On solar cells, the debris can block photons, decreasing solar cell efficiency. Since the debris is made of the same material as the wafer albeit lacking the crystalline structure of the wafer, the debris can bond to wafer surfaces and be difficult to remove.